https://bugs.gentoo.org/905785 From 049efdd72eb7baa7b2bf8884391ee7fe650da5a0 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 29 Jan 2022 13:36:55 +0100 Subject: RISC-V: Adjust -march flags for binutils 2.38 As of version 2.38 binutils defaults to ISA specification version 2019-12-13. This version of the specification has has separated the the csr read/write (csrr*/csrw*) instructions and the fence.i from the I extension and put them into separate Zicsr and Zifencei extensions. This implies that we have to adjust the -march flag passed to the compiler accordingly. Signed-off-by: Heinrich Schuchardt Reviewed-by: Daniel Kiper --- configure.ac | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/configure.ac b/configure.ac index 4f649ed..5c01af0 100644 --- a/configure.ac +++ b/configure.ac @@ -870,11 +870,19 @@ if test x"$platform" != xemu ; then CFLAGS="$TARGET_CFLAGS -march=rv32imac -mabi=ilp32 -Werror" AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])], [grub_cv_target_cc_soft_float="-march=rv32imac -mabi=ilp32"], []) + # ISA spec version 20191213 factored out extensions Zicsr and Zifencei + CFLAGS="$TARGET_CFLAGS -march=rv32imac_zicsr_zifencei -mabi=ilp32 -Werror" + AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])], + [grub_cv_target_cc_soft_float="-march=rv32imac_zicsr_zifencei -mabi=ilp32"], []) fi if test "x$target_cpu" = xriscv64; then CFLAGS="$TARGET_CFLAGS -march=rv64imac -mabi=lp64 -Werror" AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])], [grub_cv_target_cc_soft_float="-march=rv64imac -mabi=lp64"], []) + # ISA spec version 20191213 factored out extensions Zicsr and Zifencei + CFLAGS="$TARGET_CFLAGS -march=rv64imac_zicsr_zifencei -mabi=lp64 -Werror" + AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])], + [grub_cv_target_cc_soft_float="-march=rv64imac_zicsr_zifencei -mabi=lp64"], []) fi if test "x$target_cpu" = xia64; then CFLAGS="$TARGET_CFLAGS -mno-inline-float-divide -mno-inline-sqrt -Werror" -- cgit v1.1